1. Field of the Invention
The disclosure relates in general to a high voltage semiconductor device and a method for manufacturing the same, and more particularly to a high voltage semiconductor device with ESD protection and a method for manufacturing the same.
2. Description of the Related Art
With the development of semiconductor technology, the bipolar COMS DMOS (BCD) manufacturing technology has been widely used for high voltage semiconductor devices. An operating voltage of a semiconductor device for the BCD manufacturing technology has been increased, and therefore an on-chip electro-static discharge (ESD) protection design becomes a challenging task.
A high voltage semiconductor device usually has low on-state resistance (Rdson), so that an electro-static current is likely to concentrate in a surface or an edge of a drain during an electro-static event. High voltage current and high electric field will cause a physical destruction at a surface junction region. Based on a requirement for lowering the on-state resistance (Rdson), the surface or a lateral side of the high voltage semiconductor device cannot be increased. Therefore, it is a challenge to get a better ESD protection structure.
Also, a breakdown voltage of the high voltage semiconductor device is always greater than the operation voltage thereof. A trigger voltage of the high voltage semiconductor device is often higher than the breakdown voltage thereof quite a lot. Therefore, a protected device or an internal circuit usually has risks of damages during the electro-static event, before an ESD protection of the high voltage semiconductor device is turned on. To reduce the trigger voltage, it is usually required to construct an additional external ESD detection circuit.
Moreover, the high voltage semiconductor element usually has a low holding voltage. There is a possibility that the high voltage semiconductor device is triggered by an unwanted noise, a power-on peak voltage or a serge voltage and a latch-up may occur during the normal operation.
Furthermore, the high voltage semiconductor device usually has a field plate effect. The distribution of the electric field is sensitive, so the electro-static current is easy to concentrate at the surface or the edge of the drain during the electro-static event.
Other methods have been proposed for the ESD protection; however, those methods would require additional masks or manufacturing steps. One of the conventional methods for ESD protection is to add an additional device used for ESD protection only. The additional ESD device is a big size diode, a bipolar transistor (BJT), a metal oxide semiconductor transistor (MOS) being increased the surface or the lateral side, or a silicon controlled rectifier (SCR). The silicon controlled rectifier (SCR) has a low holding voltage, so the latch-up may easily occur during the normal operation.